Hao Zhuang, Ph.D.

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Hao Zhuang
Ph.D. in Computer Science
University of California, San Diego, CA, USA.
e-mail: zhuang.howard [at] gmail [dot] com

google scholar | linkedin

About

I earned my Ph.D. degree in Computer Science from University of California, San Deigo, CA, USA (UCSD) in 2016 after 3-year full-time PhD training and 1-year part-time training while I was a software engineer at ANSYS, Inc. I co-authored 15 peer-reviewed papers during this period and had around 210 (total) paper citations by the graduation. My graduate research included numerical algorithms, matrix computation, and stochastic numerical solvers, with the applications in the analysis of large-scale dynamical systems, computer-aided design, and design automation for building computer chips. Some of the techniques I developed with my awesome colleagues during my graduate research had been adopted in the industry. Now, I am generally interested in the fundamental algorithms behind computational mathematics, numerical simulation/optimization, high-performance computing (HPC) and distributed computing systems for optimization, signal processing, large-scale dynamical systems analysis. In addition, I believe the education matters a lot to our society and we should make use of the available technologies to help ourselves. Therefore, beyond building computation engines for design automation tools of VLSI chips, I also contributed to the projects, which improved and made education massive and accessible to the world by the techniques from natural language processing, computational linguistics, machine learning, numerical algorithms and matrix computation.

I am now a Senior Software Developer at ANSYS, Inc. to commercialize my research at graduate schools. Since June 2015, I write software at ANSYS Apache and build distributed computation infrastructure, large-scale matrix computation algorithms, machine learning systems, and big data applications. The products are used for power analysis and verification of tape-outs of modern low power CPU, GPU, and ASIC, which are used by different purposes of computing, such as general logic operations, deep learning, big data processing, data center traffic, etc. It is my privilege to work with the R&D teams consist of legends in the area of design automation algorithms, such as the forerunner and researchers of AWE, the creators of MIT FastCap, CMU PRIMA, UT RICE, Synopsys PrimeTime and Apache Redhawk. Before that I worked at Synopsys, Inc., designing graph partitioning algorithms and multi-threaded programs to scale up the matrix solver for full-chip power network analysis with over billion graph nodes.

Selected Publications [full list] [Google scholar citations]

Selected Patent [full list]

Honors

  • Qualcomm FMA Fellowship (2013-2014): one of the four recipients [award].

  • Prestigious Charles Lee Powell Fellowship (2012-2015): for supporting outstanding PhD engineering students.

  • Peking University Wu-Si Scholarship (2011).

Industrial Experience [details]

Academic Experience [details]

Services

  • IEEE student memeber since 2011.

  • ACM student memeber since 2014.

  • SIAM student memeber since 2014.

  • External reviewer, ACM/IEEE Design Automation Conference (DAC).

  • External reviewer, ACM/IEEE International Symposium on Physical Design (ISPD).

  • Subreviewer, IEEE Very Large Scale Integration and Systems-on-Chip (VLSI-SoC).

  • External reviewer, ACM/IEEE International Conference on Computer Aided Design (ICCAD).

  • Reviewer, IEEE Transaction on Computer Aided Design (TCAD).

  • Reviewer, Integration, the Journal of VLSI.

Selected Talks [full list]

  • “Matrix Exponential Integration in Time-Domain Analysis of Circuit Simulation,” at Department of Electrical and Electronics Engineering, The University of Hong Kong, Hong Kong, Oct. 2015

  • “Algorithms for Dynamic Power Grid Simulation Using Matrix Exponentials,” at Ansys Inc., San Jose, Sept. 2015.

Teaching

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