Implementation

  1. SWIFFT: a modest proposal for FFT hashing
    (Lyubashevsky, Micciancio, Peikert & Rosen - FSE 2008)

  2. Discrete Ziggurat: A Time-Memory Trade-Off for Sampling from a Gaussian Distribution over the Integers
    (Buchmann, Cabarcas, Gopfert, Hulsing & Weiden - SAC 2013)
    “For large standard deviations, the Ziggurat algorithm outperforms all existing methods”

  3. Efficient software implementation of ring-LWE encryption
    (deClercq, Roy, Vercauteren & Verbauwhede - DATE 2015)

  4. Efficient Ring-LWE Encryption on 8-Bit AVR Processors
    (Liu, Seo, Roy, Grosschadl, Kim & Verbauwhede - CHES 2015)

Digital Signatures in Software

  1. Practical Lattice-Based Digital Signature Schemes
    (Howe, Poppelmann, ONeill, OSullivan, Guneysu - ACM TECS 2015)

  2. High-Speed Signatures from Standard Lattices
    (Dagdelen, ElBansarkhani, Gopfert, Guneysu, Oder, Poppelmann, Sanchez & Schwabe - LatinCrypt 2014)

  3. Software Speed Records for Lattice-Based Signatures
    (Guneysu, Oder, Poppelmann & Schwabe - PQCrypto 2013)

  4. Improvement and efficient implementation of a lattice-based signature scheme
    (ElBansarkhani & Buchmann - SAC 2013)

Masking

Additively Homomorphic Ring-LWE Masking
(Reparaz, deClercq, Roy, Vercauteren & Verbauwhede - PQCrypto 2016)

A Masked Ring-LWE Implementation
(Reparaz, Roy, Vercauteren & Verbauwhede - CHES 2015)

Hardware implementation

  1. The Future of Real-Time Security: Latency-Optimized Lattice-Based Digital Signatures
    (Aysu, Yuce & Schaumont - ACM TECS 2015)

  2. High-Speed Polynomial Multiplication Architecture for Ring-LWE and SHE Cryptosystems
    (Chen, Mentens, Vercauteren, Roy, Cheung, Pao & Verbauwhede - IEEE TCaS 2015)

  3. Modular Hardware Architecture for Somewhat Homomorphic Function Evaluation
    (Roy, Jarvinen, Vercauteren, Dimitrov & Verbauwhede - CHES 2015)

  4. Accelerating Homomorphic Evaluation on Reconfigurable Hardware
    (Poppelmann, Naehrig, Putnam & Macias - CHES 2015)

  5. [Lattice-Based Signatures: Optimization and Implementation on Reconfigurable Hardware]
    (Guneysu, Lyubashevsky & Poppelmann - IEEE T.Comp 2015/ CHES 2012)

  6. High-Performance Ideal Lattice-Based Cryptography on 8-Bit ATxmega Microcontrollers
    (Poppelmann, Oder & Guneysu - LatinCrypt 2015)

  7. Compact Ring-LWE Cryptoprocessor
    (Roy, Vercauteren, Mentens, Chen & Verbauwhede - CHES 2014)

  8. Enhanced Lattice-Based Signatures on Reconfigurable Hardware
    (Popplemann, Ducas & Guneysu - CHES 2014)

  9. Beyond ECDSA and RSA: Lattice-based Digital Signatures on Constrained Devices
    (Oder, Poppelmann & Guneysu - DAC 2014)

  10. Area optimization of lightweight lattice-based encryption on reconfigurable hardware
    (Poppelmann & Guneysu - ISCAS)

  11. Sampling from discrete Gaussians for lattice-based cryptography on a constrained device
    (Dwarakanath & Galbraith - AAECC 2014)

  12. High Precision Discrete Gaussian Sampling on FPGAs
    (Roy, Vercauteren & Verbauwhede - SAC 2013) Employs the Knuth-Yao algorithm.

  13. Towards Practical Lattice-Based Public-Key Encryption on Reconfigurable Hardware
    (Poppelmann & Guneysu - SAC 2013)

  14. Implementing Modular FFTs in FPGAs - A Basic Block for Lattice-Based Cryptography
    (Gyorfi, Cret & Borsos - DSD 2013)

  15. Low-cost and area-efficient FPGA implementations of lattice-based cryptography
    (Aysu, Patterson & Schaumont - HOST 2013)

  16. Towards Efficient Arithmetic for Lattice-Based Cryptography on Reconfigurable Hardware
    (Poppelmann & Guneysu - LATINCRYPT 2012

  17. On the Design of Hardware Building Blocks for Modern Lattice-Based Encryption Schemes
    (Gottert, Feller, Schneider, Buchmann & Huss - CHES 2012)

  18. Practical Lattice-Based Cryptography: A Signature Scheme for Embedded Systems
    (Guneysu, Lyubashevsky & Poppelmann - CHES 2012)

Random Number Generation

  1. A Very High Speed True Random Number Generator with Entropy Assessment
    (Cherkaoui, Fischer, Fesquet & Aubert - CHES 2013)

  2. High-speed true random number generation with logic gates only
    (Dichtl & Golic - CHES 2007)

  3. High performance true random number generator based on FPGA block RAMs
    (Gyorfi, Cret & Suciu - IPDPS 2009)

  4. Practical Issues in Implementing TRNGs in FPGAs Based on the Ring Oscillator Sampling Method
    (Cret, Suciu & Gyorfi - SYNASC 2008)

  5. FPGA vendor agnostic true random number generator
    (Schellekens, Preneel & Verbauwhede - FPL 2006)

Pre-Prints

Software Libraries