1. Circuit Simulation using Parallel Processing: The project is to analyze and verify VLSI systems via full circuit simulation and to demonstrate vastly improved scalability in order to raise the quality and scope of predictive circuit modeling. VLSI circuit simulation has become critical due to interconnect dominance of advanced fabrication technologies. Functional modules are integrated through substrates and connected by wires with parasitics. A simulation of the whole system will empower designers with a full grasp of the transient behavior of the circuits.
2. Power Network Analysis: The project is to analyze and synthesize power distribution for VLSI circuits. The focus is on the design planning stage to explore the VLSI technologies. The goal is to optimize the efficiency of the power networks in terms of the production cost, design flow, and quality of power supply.
3. High Performance Interconnect: The project is to push the performance envelopes in terms of the signal latency, bandwidth, and power conumption for on-chip and off-chip interconnect.
4. 3D IC Layout: The project is to investigate the floorplanning and bus synthesis for three-dimensional integrated circuits. The goal is to extract and manipulate the topology of 3D geometry for physical layout.