I am interested in the design and implementation of novel
architectures that make use of increasingly plentiful transistor
resources to improve the energy-efficiency of executing code and to
provide qualitatively new features in support of higher-level language
constructs. My recent work has focused on designs that exploit the
new trade-offs among area, power, and performance brought about by the
growing trend of dark silicon. My interests are primarily in
the area of computer architecture, but include aspects of compilers
and VLSI as they relate to developing and using customizable
processors, increasing hardware specialization, implementing
aggressive power management techniques, designing energy-efficient
circuits, and deploying other means of controlling and exploiting the
growth of dark silicon. I am also interested in architectural
enhancements to multi-core memory systems to accelerate and extend
support for parallel software constructs and richer memory semantics,
as well as the design of on-chip memory networks for
massively-heterogeneous many-core systems.
I am one of the organizers for DaSi, the Dark Silicon Workshop.
For an overview of my publications, you can check out my Google Scholarprofile or look at the sections below.
I have been a teaching assistant eight times: seven times at UC Berkeley as an undergraduate/graduated-non-student, and once at UC San Diego as a graduate student.
I haven't found a publicly visible page that displays the UCSD TA evaluations. UCSD, Spring 2006 - CSE 141/141L: 4.178/4.748 (respectively). Ratings are on a 5 scale.
Evaluations for 5 out of the 7 times I was a TA at UC Berkeley. Summer 2000 and Summer 2002 CS 61B do not appear to be listed.
