 | Erika Cota, Luigi Carro, Alex Orailoglu and Marcelo Lubaszewski.
``Achieving Global Test Optimization in Core-Based Systems''
Journal of Electronic Testing: Theory and Applications, In Press, 2003. [pdf]
|
| Ismet Bayraktaroglu and Alex Orailoglu.
``Concurrent Application of Compaction and Compression for
Test Time and Data Volume Reduction in Scan Designs''
IEEE Transactions on Computers,
Vol. 52,
November 2003. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``Partial Core Encryption for
Performance-Efficient Test of SOCs''
Proceedings of the International Conference on Computer Aided Design,
November, 2003. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``Test Data Manipulation Techniques for Energy Frugal, Rapid
Scan Test''
Proceedings of the
IEEE Asian Test Symposium,
November 2003. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``Aggressive Test Power Reduction through Test Stimuli Transformation''
Proceedings of the IEEE International Conference on Computer Design,
October 2003. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``Modeling Scan Chain Modifications for
Scan-in Test Power Minimization''
Proceedings of the IEEE
International Test Conference,
October 2003. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``Hierarchical Constraint Conscious RT-Level
Test Generation''
Euromicro Symposium on Digital System Design (DSD),
September 2003. [pdf]
|
| Ozgur Sinanoglu, Ismet Bayraktaroglu and Alex Orailoglu.
``Reducing Average and Peak Test Power through
Scan Chain Modification''
Journal of Electronic Testing: Theory and Applications,
Vol. 19, No. 4,
August 2003, pp. 457-467. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``Compacting Test Buses for Deeply Embedded
SOC Cores''
IEEE Design and Test of Computers,
Vol. 20, No. 4,
July-August 2003, pp. 22-30. [pdf]
|
| Wenjing Rao, Ismet Bayraktaroglu and Alex Orailoglu.
``Test Application Time and Volume Compression through Seed Overlapping''
IEEE Design Automation Conference,
Anaheim, California,
June 2003, pp. 732-737. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``Parity-Based Output Compaction for
Core-Based SOCs''
Formal Proceedings of the IEEE European Test Workshop, pp. 15-20,
May 2003. [pdf]
|
| Ismet Bayraktaroglu and Alex Orailoglu.
``Decompression Hardware Determination for Test Volume and Time
Reduction through Unified Test Pattern Compaction and Compression ''
Proceedings of the IEEE VLSI Test Symposium,
April 2003, pp. 113-118. [pdf]
|
| Wenjing Rao and Alex Orailoglu.
``Virtual Compression through Test Vector Stitching
for Scan Based Designs''
Proceedings of IEEE Design, Automation and Test in Europe Conference,
March 2003, pp. 104-109. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``Fast and Energy-Frugal Deterministic Test
Through Test Data Correlation Exploitation''
Proceedings of the IEEE International Symposium on
Defect and Fault Tolerance in VLSI Systems,
November 2002, pp. 325-333. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``A Novel Scan Architecture for Power-Efficient, Rapid Test''
Proceedings of the International Conference on Computer Aided Design,
November 2002, pp. 299-303. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``Efficient Construction of Aliasing-Free
Compaction Circuitry''
IEEE Micro,
September 2002, pp. 82-92. [pdf]
|
| Ozgur Sinanoglu, Ismet Bayraktaroglu and Alex Orailoglu.
``Scan Power Reduction through Test Data Transition Frequency Analysis''
Proceedings of the IEEE
International Test Conference,
October 2002, pp. 844-850. [pdf]
|
| Sherief Reda and Alex Orailoglu.
``Reducing Test Application Time through Test Data
Mutation Encoding''
Proceedings of IEEE Design, Automation and Test in Europe Conference,
April 2002, pp. 387-393. Best Paper Award [pdf]
|
| Ozgur Sinanoglu, Ismet Bayraktaroglu and Alex Orailoglu.
``Test Power Reduction for Embedded Cores through Minimization of
Scan Chain Transitions'',
Proceedings of the IEEE VLSI Test Symposium,
April 2002, pp. 166-171. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``Space and Time Compaction Schemes with Minimum
Test Application Time''
Proceedings of the IEEE International Test Conference,
November 2001, pp. 521-529. [pdf]
|
| Ozgur Sinanoglu and Alex Orailoglu.
``Compaction Schemes with Minimum Test Application Time''
Proceedings of the IEEE Asian Test Symposium,
November 2001, pp. 199-204. [pdf]
|
| Ismet Bayraktaroglu and Alex Orailoglu.
``Test Volume and Application Time Reduction through Scan
Chain Concealment''
IEEE/ACM Design Automation Conference,
June 2001, pp. 151-155. [pdf]
|
| Peter Petrov and Alex Orailoglu.
``An integrated solution for DFT library
validation in industrial settings''
Proceedings of the IEEE/ACM User's Forum of
Design Automation and Test in Europe Conference,
Paris, France, March 2000. [pdf]
|
| Sule Ozev and Alex Orailoglu.
``Test Synthesis for Mixed-Signal SOC Paths'',
Proceedings of the IEEE/ACM
Design Automation and Test in Europe Conference,
Paris, France, March 2000, pp. 128-133. [pdf]
|
