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 RSSL
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 | Ozgur Sinanoglu and Alex Orailoglu.
`` Efficient RT-level Fault Diagnosis Methodology''
Asian South Pasific Design Automation Conference,
Jan 2004. [pdf]
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 | Yiorgos Makris, Ismet Bayraktaroglu and Alex Orailoglu.
``Enhancing Reliability of RTL Controller-Datapath
Circuits via Invariant-Base Concurrent Test''
IEEE Transactions on Reliability,
December 2003. [pdf]
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 | Yiorgos Makris and Alex Orailoglu.
``Test Requirement Analysis for Low Cost Hierarchical Test
Path Construction''
Proceedings of the IEEE Asian Test Symposium,
November 2002, pp. 134-139. [pdf]
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 | Yiorgos Makris, Jamison Collins and Alex Orailoglu.
``Fast Hierarchical Test Path Construction
for Circuits with DFT-Free Controller-Datapath Interface''
Journal of Electronic Testing: Theory and Applications,
Vol. 18, No. 1,
2001, pp. 29-42. [pdf]
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 | Ozgur Sinanoglu and Alex Orailoglu.
``RT-Level Fault Simulation Based on Symbolic
Propagation''
Proceedings of the IEEE VLSI Test Symposium
April 2001, pp. 240-245. [pdf]
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 | Yiorgos Makris, Vishal Patel and Alex Orailoglu.
``Efficient Transparency Extraction and Utilization
in Hierarchical Test''
Proceedings of the IEEE VLSI Test Symposium
April 2001, pp. 246-251. [pdf]
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 | Yiorgos Makris and Alex Orailoglu.
``Fast Hierarchical Test Path Construction
for DFT-Free Controller-Datapath Circuits''
Proceedings of the Ninth
IEEE Asian Test Symposium,
Taipei, Taiwan, December 2000, pp. 484-488. [pdf]
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 | Yiorgos Makris, Jamison Collins and Alex Orailoglu.
``How to Avoid Random Walks in Hierarchical Test Path Identification''
Formal Proceedings of the IEEE European Test Workshop,
Lisbon, Portugal, May 2000, pp. 111-116. [pdf]
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 | Yiorgos Makris and Alex Orailoglu.
``Modular Test Generation and Concurrent Transparency-Based
Test Translation Using Gate-Level ATPG''
Proceedings of the IEEE Customs Integrated Circuits Conference,
Orlando, Florida, May 2000, pp. 75-78. [pdf]
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 | Yiorgos Makris, Ismet Bayraktaroglu and Alex Orailoglu.
``Invariance-Based On-Line
Test for RTL Controller-Datapath Circuits'',
Proceedings of the IEEE VLSI Test Symposium,
Montreal, Canada, April 2000, pp. 459-464. [pdf]
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 | Yiorgos Makris, Jamison Collins, Alex Orailoglu and Praveen Vishakantaiah.
``Transparency-Based Hierarchical Test Generation for Modular RTL
Designs'',
IEEE International Symposium on Circuits and Systems,
Geneva, Switzerland, May 2000, pp. 689-692. [pdf]
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