Hierarchical Tiling Publications


Rescheduling for Locality in Sparse Matrix Computations ( pdf )
Michelle Mills Strout, Larry Carter, and Jeanne Ferrante
International Conference on Computation Science , San Fransisco, California, May 28-30, 2001.

A Modal Model of Memory ( pdf )
Nick Mitchell, Larry Carter, and Jeanne Ferrante
International Conference on Computation Science A , San Fransisco, California, May 28-30, 2001.

Localizing Non-Affine Array References ( postscript, pdf )
Nick Mitchell, Larry Carter, and Jeanne Ferrante
Proceedings of International Conference on Parallel Architectures and Compilation Techniques, October, 1999.

ILP versus TLP on SMT ( postscript, pdf )
Nick Mitchell, Larry Carter, Jeanne Ferrante, and Dean Tullsen
Supercomputing '99, November 1999.

Selecting tile shape for minimal execution time ( postscript)
K. Högstedt, L. Carter and J. Ferrante.
Proceedings of Eleventh ACM Symposium on Parallel Algorithms and Architectures, June, 1999.
( UCSD Technical Report CS99-616 with proofs)

Explorations in Symbiosis on Two Multithreaded Architectures (postscript )
A. Snavely, N. Mitchell, L. Carter, J. Ferrante, and D. Tullsen
Workshop on Multithreaded Execution And Compilation (MTEAC) January 1999.

Schedule-Independent Storage Mapping in Loops ( postscript, pdf)
Michelle Mills Strout, Larry Carter, Jeanne Ferrante, and Beth Simon
Architectural Support for Programming Languages and Operating Systems, San Jose, California, October 4-7, 1998.

Quantifying the Multi-Level Nature of Tiling Interactions
Nicholas Mitchell, Karin Högstedt, Larry Carter and Jeanne Ferrante
International Journal of Parallel Programming, 1998.
.ps .pdf

Quantifying the Multi-Level Nature of Tiling Interactions
Nicholas Mitchell, Larry Carter, Jeanne Ferrante and Karin Högstedt
Languages and Compilers for Parallel Computing, Minneapolis, Minnesota, August 7-9 1997.
.ps.gz

A Compiler Perspective on Architectural Evolutions
Mitchell, N., L. Carter, and J. Ferrante
IEEE Technical Communications on Computer Architectures (TCCA), June 1997
.ps.gz PDF, Abstract, Slides in PDF

Determining the Idle Time of a Tiling
Högstedt, K., L. Carter, and J. Ferrante
Symposium on Principle of Programming Languages (POPL), January 1997
.ps Slides in PDF, UCSD Tech Report CS96-489(ps)

Hierarchical Tiling: A Methodology for High Performance
Carter, L., J. Ferrante, S. Flynn Hummel, B. Alpern, and K.S. Gatlin,
UCSD Tech Report CS96-508, November 1996
.ps

Hierarchical Tiling for Improved Superscalar Performance
L. Carter, J. Ferrante and S. Flynn Hummel
International Parallel Processing Symposium, April 1995
.ps

Efficient Multiprocessor Parallelism via Hierarchical Tiling
L. Carter, J. Ferrante and S. Flynn Hummel
SIAM Conference on Parallel Processing for Scientific Computing, February 1995
.ps


PMH Publications


The Uniform Memory Hierarchy Model of Computation
Alpern, B., L. Carter, E. Feig, and T. Selker
Algorithmica, Volume 12, Number 2-3, August-September 1994
.ps

Modeling Parallel Computers as Memory Hierarchies
Alpern, B., L. Carter, and J. Ferrante
Programming Models for Massively Parallel Computers, Giloi, W. K., S. Jahnichen, and B. D. Shriver ed., IEEE Press, 1993.
.ps