CSE 249A -- The Changing Role of the Microprocessor Core
Instructor: Dean Tullsen
tullsen at cs dot ucsd dot edu
office hours by appointment
This is a paper reading course. We'll read about 3 papers a week. Most will be presented by students.
If you are enrolled for 2 units, you are expected to present on your turn, and read the papers and participate in discussions when it is not your turn.
If you are enrolled for 4 units, you are expected to also do a research-style project, to be turned in before Monday of finals week.
Class meets MW 5-6:20 in CSE 4217
Schedule:
| January 4 | Introduction | Dean |
| January 6 | Heterogeneous Cores:
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction, Rakesh Kumar, Keith Farkas, Norm P. Jouppi, Partha Ranganathan, Dean M. Tullsen, In 36th International Symposium on Microarchitecture, December, 2003. Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance, Rakesh Kumar, Dean M. Tullsen, Partha Ranganathan, Norman P. Jouppi, Keith I. Farkas, In 31st International Symposium on Computer Architecture, June, 2004. |
Dean |
| January 11 | Heterogeneous Cores: Core Architecture Optimization for Heterogeneous Chip Multiprocessors, Rakesh Kumar, Dean M. Tullsen, and Norman P. Jouppi, In 15th International Symposium on Parallel Architecture and Compilation Techniques, September, 2006. Amdahl's Law in the Multicore Era, Mark D. Hill and Michael R. Marty, IEEE Computer, July 2008 |
Ashish |
| January 13 | Heterogeneous Cores: Conservation Cores: Reducing the Energy of Mature Computations Ganesh Venkatesh, Jack Sampson, Nathan Goulding, Saturnino Garcia, Vladyslav Bryksin, Jose Lugo-Martinez, Steven Swanson, Michael Bedford Taylor. In proceedings of the Fifteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2010), March 2010 PDF |
Sravanthi |
| January 17 | MLK Jr Holiday | |
| January 19 | Dynamic Heterogeneity:
E. İpek, M. Kırman, N. Kırman, and J.F. Martínez. Core Fusion: Accommodating software diversity in chip multiprocessors. In Intl. Symp. on Computer Architecture, San Diego, CA, June 2007 [PDF] |
Manish |
| January 24 | Dynamic Heterogeneity:
"Composable Lightweight Processors" C. Kim, S. Sethumadhavan, M.S. Govindan, N. Ranganathan, D. Gulati, D. Burger, Stephen Keckler, in International Symposium on Microarchitecture (MICRO), December 2007 |
Sravanthi |
| January 26 | Blurring the lines between
cores: Conjoined-Core Chip Multiprocessing, Rakesh Kumar, Norman P. Jouppi, Dean M. Tullsen, In 37th International Symposium on Microarchitecture, December, 2004. |
Ashish |
| January 31 | Blurring the lines between
cores: The StageNet Fabric for Constructing Resilient Multicore Systems ( pdf ) Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason Blome, and Scott Mahlke Proc. 41st Intl. Symposium on Microarchitecture (MICRO) Nov. 2008 |
Putt |
| February 2 | Tutorial on GPGPU architectures and programming | Manish |
| February 7 | Blurring the lines between
cores: The Shared-Thread Multiprocessor , Jeffery A. Brown and Dean M. Tullsen, In 22nd ACM International Conference on Supercomputing, June, 2008. |
Sid |
| February 9 |
Tong Li; Brett, P.; Knauerhase, R.; Koufaty, D.; Reddy, D.; Hahn, S.; ,
"Operating
system support for overlapping-ISA heterogeneous multi-core
architectures," High
Performance Computer Architecture (HPCA), 2010 IEEE 16th International
Symposium on , vol., no.,
pp.1-12, 9-14 Jan. 2010 |
Ashish |
| February 14 | no class | |
| February 16 | no class | |
| February 21 | President's Day Holiday | |
| February 23 | K. Sundaramoorthy, Z. Purser, and E. Rotenberg. Slipstream Processors: Improving both Performance and Fault Tolerance. Proceedings of the 9th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-9), pp. 257-268, November 2000. [pdf] | Putt |
| February 28 | Carbon: Architectural Support for Fine-Grained Parallelism on Chip Multiprocessors Sanjeev Kumar Christopher J. Hughes Anthony Nguyen | Sid |
| March 2 | EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system Pdf Perry H. Wang, Jamison D. Collins, Gautham N. Chinya, Hong Jiang, Xinmin Tian, Milind Girkar, Nick Y. Yang, Guei-Yuan Lueh , Hong Wang | Sravanthi |
| March 7 | ||
| March 9 | no class |
Papers:
Short Threads
Fast Thread Migration via Cache Working Set Prediction, Jeffery A. Brown, Leo Porter and Dean M. Tullsen, In 17th International Symposium on High Performance Computer Architecture, February, 2011.
Accurate Branch Prediction for Short Threads, BumYong Choi, Leo Porter, Dean M. Tullsen, In Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems, April, 2008.
New programming models:
Data-Triggered Threads: Eliminating Redundant Computation, Hung-Wei Tseng and Dean M. Tullsen, In 17th International Symposium on High Performance Computer Architecture, February, 2011.
Speculation Support
K. Sundaramoorthy, Z. Purser, and E. Rotenberg. Slipstream Processors: Improving both Performance and Fault Tolerance. Proceedings of the 9th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-9), pp. 257-268, November 2000. [pdf]
Necromancer: Enhancing System Throughput by Animating Dead Cores ( pdf ) Amin Ansari, Shuguang Feng, Shantanu Gupta, and Scott Mahlke Proc. 37th Intl. Symposium on Computer Architecture (ISCA) Jun. 2010.
Design (eg, power) constraints:
J. Huh, D. Burger, and S. W. Keckler, ``Exploring the Design Space of Future CMPs,'' in PACT '01: Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques, pp. 199-210, 2001 link.
Mitigating Amdahl's Law through EPI Throttling Murali Annavaram Ed Grochowski John Shen, ISCA 2005
An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget Canturk Isci, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose and Margaret Martonosi
Energy-Performance Tradeoffs in Processor Architecture and Circuit Design: A Marginal Cost Analysis, Omid Azizi et al, ISCA 2010 (link)
"Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multi-Core Memory Systems" Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, and Yale N. Patt, (ASPLOS 2010) http://hps.ece.utexas.edu/people/ebrahimi/pub/ebrahimi_asplos10.pdf
SpMT on CMPs
Jose Renau† Karin Strauss Luis Ceze Wei Liu Smruti Sarangi James Tuck Josep Torrellas; Energy-Efficient Thread-Level Speculation on a CMP
S. T. Srinivasan, H. Akkary, T. Holman, and K. Lai, .A minimal dual-core speculative multi-threading architecture,. in IEEE International Conference on Computer Design, Oct. 2004.
Transactional Memory
M. Herlihy and J. E. B. Moss, .Transactional memory: Architectural support for lock-free data structures,. in 20th International Symposium on Computer Architecture, May 1993.
L. Hammond, V. Wong, M. Chen, B. D. Carlstrom, J. D. Davis, B. Hertzberg, M. K. Prabhu, H. Wijaya, C. Kozyrakis, and K. Olukotun, .Transactional memory coherence and consistency,. in 31st International Symposium on Computer Architecture, June 2004.
Support for Parallelism (should be more here):
Carbon: Architectural Support for Fine-Grained Parallelism on Chip Multiprocessors Sanjeev Kumar Christopher J. Hughes Anthony Nguyen
Memory hierarchy
Jichuan Chang , Gurindar S. Sohi: Cooperative Caching for Chip Multiprocessors. ISCA 2006
Nikos Hardavellas, Michael Ferdman, Babak Falsafi, Anastasia Ailamaki: Reactive NUCA: near-optimal block placement and replication in distributed caches. ISCA 2009
Aniruddha N. Udipi, Naveen Muralimanohar, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi. Rethinking DRAM design and organization for energy-constrained multi-cores. ISCA 2010
More heterogeneous
Synergistic processing in Cell's multicore architecture (IEEE Micro, March 2006, pdf) (M. Gschwind, P. Hofstee, B. Flachs, M. Hopkins, Y. Watanabe, T. Yamazaki)
EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system Pdf Perry H. Wang, Jamison D. Collins, Gautham N. Chinya, Hong Jiang, Xinmin Tian, Milind Girkar, Nick Y. Yang, Guei-Yuan Lueh , Hong Wang