cse141L Lab 1: Lab 1: Be a Hardware Hacker!

Due: April 8

Lab 1 is a preparation stage for future labs, and consists of two parts - Xilinx ISE and Verilog. In Lab 1, you will install Xilinx ISE and follow a step-by-step tutorial to learn essential concepts and working flow in hardware designs. For those who used Xilinx ISE in 140L, this lab would be very easy. Otherwise, you should START NOW - there might be many unexpected problems. If you have any question regarding this lab, please post it on the webboard.


  • Get Xilinx WebPack 10.1 from this link.
  • Xilinx Quick Tutorial

    Xilinx provides a good step-by-step tutorial. With this tutorial, you will be able to learn how to perform various activitisecan in the hardware design process. It should take less than two hours to follow the tutorial.

    A Simple 8 bit Adder

    Now that you know how to use XilinX ISE, we will examine a few aspects of hardware design. For more information, I highly recommend to skim through chapter 2 and chapter 5 of Xilinx In-depth Tutorial.

    32 bit Adder


    Free Form Experiment

    Useful Resources


    • No lab intErview for lab 1. In future labs, you will have interview sessions with TA to show your results.
    • Submit your report for the questions above to the TA via e-mail by the due date before the beginning of the class.

    Due: April 8