cse141: Introduction to Computer Architecture

Warren Lecture Hall 2111
Lectures Tue. & Thu., 11:00-12:20; Disc. section Wed. 2:00-2:50 (Center Hall 214)
Winter, 2008
Shortcuts: Schedule Homeworks

Instructor

Steven Swanson
Email: swanson @ cs.ucsd.edu
IM (not email): professorswanson@{AIM, Yahoo!, google talk, MS Messenger}
Office: EBU3B 3212
Office Hours: Tue. 1:00-2:00; Fri. 10:00-11:00
UCSD homepage

Teaching Assistant

Sat Garcia
Email: sat @ cs.ucsd.edu
IM (not email): CSE Sat@AIM
Office: EBU3B B240A
Office Hours: Monday 1-2, Wednesday 3-4, or by appointment


Course discussion board: cse141. Required reading. Get signed up.

Course Description

This course will describe the basics of modern processor operation. Topics include computer system performance, instruction set architectures, pipelining, branch prediction, memory-hierarchy design, and a brief introduction to multiprocessor architecture issues.

This course is taught in tandem with 141L. Unless you have discussed it with you me, you should be in enrolled in both.


Text books

Required: Patterson & Hennessy, Computer Organization and Design: The Hardware/Software Interface, Patterson & Hennessy, Morgan Kaufmann, 3rd Edition
Required: Other assigned readings throughout the quarter.

Grading

In addition to the contributions below, class participation (speaking up in class, attending office hours, etc.) can raise your grade up to one "notch" (e.g., B to B+).

Homework 15% Homeworks will be assigned through the course. They are due on Tuesdays.
Quizzes 15% Every Thursday there will be a quiz.
Midterm 25% The midterm is on October 25th.
Final 35% The final is on December 14th at 11:30-2:30. It will be cummulative.
Postings to the class web board 10% You should post questions and/or answers to the web board at least twice per week.

Additional notes about grades in this course:


Schedule

Items in the schedule more that one week in the future are subject to change. Check back for updates for the assigned readings, etc. The date for the midterm will not change, however. Nor will deadlines for homeworks/projecsts that have been assigned be move earlier.

I will post the slides for most lectures. Since the slides contain material I am not allowed to distribute publically, they are password protected. I have posted the username and password to the web board.

Date Topic Readings Slides Due Notes
Tuesday, January 8 Administrivia; Overview of architecture slides , slides
Thursday, January 10 Technology/ISAs Chapter 1; Sections 2.1-2.6, 2.9; Review Chapter 3 slides , slides
Tuesday, January 15 ISAs Chapter 4 - first half slides Assignment 1-1; Assignment 1-2;
Thursday, January 17 Performance Chapter 4 - second half slides , slides
Tuesday, January 22 Performance/Single cycle processors Chapter 5: Sections 5.1 - 5.4 slides , slides Assignment 2-1; Assignment 2-2;
Thursday, January 24 Single cycle processors/multi-cycle processors Chapter 5: Sections 5.5 - 5.11 slides , slides , slides
Tuesday, January 29 Multi-cycle processors Chapter 6: Sections 6.1 - 6.6 slides , slides Assignment 3-1; Assignment 3-2;
Thursday, January 31 Pipelining Chapter 6: Sections 6.7 - 6.12 slides , slides
Tuesday, February 5 Pipelining slides
Thursday, February 7 Data Hazards; Midterm review slides , slides Assignment 4;
Tuesday, February 12 Midterm Assignment 5;
Thursday, February 14 Control Hazards slides
Tuesday, February 19 Midterm recap; control hazards
Thursday, February 21 Branch prediction slides
Tuesday, February 26 Advanced Pipelining Assignment 6-1; Assignment 6-2;
Thursday, February 28 Memory systems 7.1-7.3 slides , slides
Tuesday, March 4 No Class Cache Handout (see slides) slides
Thursday, March 6 Memory systems 7.4-7.8 Assignment 7-1; Assignment 7-2;
Tuesday, March 11 Virtual Memory
Thursday, March 13 Parallelism/"Real-life Architecture" slides , slides
Thursday, March 20 Final Exam Assignment 8; 11:30-2:30

Integrity Policy


Homework

Assignment 1: Discussion board and grading administrivia
Assignment 2: ISAs and Performance
Assignment 3: Performance and Datapath & Control
Assignment 4: Multicycle CPU
Assignment 5: Pipelining
Assignment 6: Control Hazards (or "Danger Will Robinson")
Assignment 7: Caches (or "Money, Money, Money!")
Assignment 8: Virtual Memory