CSE 141: Introduction to
Computer Architecture


Instructor

Michael B. Taylor
email
EBU 3B 4110 office
gchat

Teaching Assistant

Matt Devuyst
email
EBU 3B 3250 office
gchat

Class Meetings

DateTimeLocation
Lecture TuTh 12:30p-1:50p Peter 102
Discussion W 1:00p-1:50p Centr 212
Final 6/7/2010 11:30a-2:30p TBA


Join and monitor this google group immediately:
cse-141-taylor
     

Office Hours

Prof Michael Taylor
where (via gchat)
when anytime; will respond when available
often good times: TuTh 7-9a & 5-6p
 
TA Matt DeVuyst
when Mondays and Wednesdays 2:30pm-3:30pm
where EBU3B (CSE building) room B250A

Course Description


The course examines the basics of modern processor operation. Topics include computer system performance, instruction set architectures, pipelining, branch prediction, memory-hierarchy design, and a brief introduction to multiprocessor architecture issues.

This course is taught in tandem with CSE 141L. Unless you have discussed it with me, you should be enrolled in both.


Required Textbook

Computer Organization and Design: The Hardware/Software Interface,
Patterson & Hennessy, Morgan Kaufmann, 4th Edition

You MUST OWN the book, and this edition of the book.

Grading

Project 21% Design your own ISA!
Midterm 21% Closed book.
Final 31% Cumulative; closed book.
Homework 10% Homeworks assigned through the course. They aren't worth much, but help you pace yourself. Statistically graded. Due in TA's mailbox 5 minutes before class.
Quizzes 10% Randomly; they will help make sure you pace yourself on the material
Class Participation 7% or more In class, or in the google group

Grading Appeal Process If you feel there has been an error in how a test was graded, you have one week from when the assignment is return to bring it to our attention. There is no regrading of HW because of the small weight. You must submit to the appropriate TA a written description of the problem issue, what you feel the fair resolution is, and your unmodified coursework. We photocopy a random sampling of student exams to detect inappropriate modifications. Note that we regrade the entire exam; so your grade may either rise or fall after resubmission. Should, after you appeal, you be unsatisfied with the TA's treatment of the issue, you may resubmit the appeal to the professor.


Schedule

NOTE: Subject to skew and jitter. We reserve the right to change this. I will post the slides for most lectures. Since the slides contain material I am not allowed to distribute publically, they are only available from on campus or via the campus proxy. Instructions for setting up the proxy can be found here. Using the proxy is useful in general, since it gives you full access to the libraries and other resources from off campus.

Tue, March 30 Overview, Administrivia, ISA Design slides
Thu, April 01 Instruction Set Design Read: 1.1-1.3; 2.1-2.7; Key points: Types of machines and general terminology. Parts of the machine. Key components of an instruction set. Operand storage in registers and memory. Arithmetic, logical, and memory ops in MIPS.

Lab 1 Out:
Alpha deadline Apr 13; Beta deadline Apr 20; Final deadline Apr 27;
slides
Tue, April 06 Instruction Set Design Read: 2.8, 2.10, 2.12-2.13, 2.16-2.19 Skim/Review: 2.4, 2.6, 2.9, 2.14; Key points: Function calls, translation from source code to machine code, the diversity of ISA design decisions between MIPS, ARM, and x86.
Thu, April 08 Instruction Set Design
Tue, April 13 Measuring Performance Read: 1.4-1.9; Key points: Speedup. The performance equation. Amdahl's law. Benchmarks and their shortcomings slides
Thu, April 15 Measuring Performance
Tue, April 20 Perf/Single Cycle processors Read: 4.1-4.4; Key points: Designing a single-cycle datapath, datapath vs. control, clocking, control signals, decoding, handling branches. Review Appendix C if your logic design is rusty.
Thu, April 22 Sigle Cycle Implementation Read: 4.5-4.6; Key points: Basic of pipelining. Pipelined datapath layout. Pipeline registers. Limitations of pipelining.
Tue, April 27 Basic Multi Cycle Implementation; Pipelining Read: 4.7-4.8 slides
Thu, April 29 Data hazards; SRAM Read: 4.9
Tue, May 04 Control hazards; DRAM slides
Thu, May 06 More pipelining slides
Tue, May 11 Midterm This is the official date!
Thu, May 13 Branch Prediction Read: 4.10-4.14, except 4.12 slides
Tue, May 18 Introduction to caching
Thu, May 20 Memory Systems Read: 5.1-5.3 slides
Tue, May 25 Advanced caching and VM Read: 5.4-5.5 slides
Thu, May 27 I/O & VM Read: 6.1-6.13
Tue, June 01 Multiprocessors/Advanced Pipelining Read: 7.1-7.3; 7.7
Thu, June 03 CMPs/Wrap up and Final review

Discussion Schedule

NOTE: Subject to skew and jitter. We reserve the right to change this.

Wed, March 31 MIPS
Wed, April 07 Designing your Project ISA
Wed, April 14 Hacking the Assembler Infrastructure slides
Wed, April 21 Hacking the Simulator Infrastructure
Wed, April 28 NONE
Wed, May 05 MIDTERM Review slides
Wed, May 12 NONE
Wed, May 19 NONE
Wed, May 26 NONE
Wed, June 02 Final Review

Academic Integrity

Cheating is unacceptable. Our policy in this class is to aggressively pursue cheaters, and to ensure that they receive the maximum penalty allowable under the University of California academic system. If you are choosing between not turning in an assignment, or using somebody's else work, do yourself a favor and just don't turn it in. You are facing a permanent mark on your academic record and a certainty of having to explain it to any future employer or school that you apply to.

Exams You must work independently on exams. You may be held responsible if you allow others to copy your work.

Project For the project, if students are allowed to work in groups, you may obviously work with your group members. With non-group members, you may brainstorm about the ISA but you better make sure there are substantial differences between your ISA encodings and features, and you must write your own code. We will use automatic software for finding inappropriate similarities between student code, and substantial similarities in student work (including to previous teachings of the class) could result in us requiring the student to redo the assignment, or in cases of copying, referring the student to UCSD for cheating.

HW For homeworks, you may study and work with other students. However, you may not look at their write-ups. and you should not look at another student's homeworks before you have done the assignment yourself. A solutions manual, meant only for instructors, exists for this text. Obtaining or using this or other materials (such as other faculty's posted solutions to book problems) is cheating.

Projects

Project 1: Design Your Own ISA