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This quarter, ten teams independently created pipelined microprocessors with their own unique
custom instruction set, architecture, microarchitecture and complete synthesized
verilog FPGA implementation. The students also wrote assemblers and simulators,
and implemented a virtual machine that allowed them to share binaries with the
rest of the class. Many of these designs clocked at over 100 MHz, which is very
good for a Xilinx microprocessor implementation.
Among the class's innovative designs include Shane Mainali and Sanjay Pullabhatla's 5-core shared-memory multicore microprocessor and Greg Geldman and Melissa Weaver's dual-core, shared-memory, message passing microprocessor. Below is a list of designs and their proud authors. |
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| Team Name | Members | Award Title |
|---|---|---|
| TEAM: Test, Emulate, And Mystify | Shane Mainali Sanjay Pullabhatla |
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| Team Flip Flop and Ya Don't Stop | Greg Geldman Melissa Weaver | (dual core with fair-arbitration, shared memory and message passing) |
| Team Icaro | Anton Escobedo Carl Nilsson | |
| First Team | Nathan Hazout William Tai | |
| Team 6 | Alex Barsan Jon Campbell | |
| Men in Black | Chad Kingsley Vijay Raman | |
| Team Awesome | Xavier Monraz Scott Wilson | |
| FHF - Free Hardware Foundation | Jenan Wise | |
| NAND1 | Wing Lun Fung Minh Nguyen | |
| tlhlngan maH! | Chris Barrett |
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| Xi and Linx, honorary class scapegoats |
Each lab will be evaluated based on two components: (1) demo interview and (2) lab report. In the demo interview, you will briefly explain your design and show working results. It is your responsibility to intelligently discuss your design choices. You are also required to submit a lab report for each lab, but it will be brief answers for provided questions, with usually less than 5 pages.
| Date | Title |
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| Date | Title | Due |
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With the exception of the first lab, you will work in teams of two. (Lab1 is individual.)
