Qiao XIN (qxin@cs.ucsd.edu)
Thu, 25 May 2000 01:02:30 -0700 (PDT)

Qiao Xin

Evaluation of the Paper: The Multics Virtual Memory:
Concepts and Design

As the emerging of the requirement of rapid but controlled sharing of
information stored on-line at the central facility in remote-access,
multiprogrammed systems, Multics segmentation is designed to enable
that all on-line information to be addressed directly by a processor
and to have control access to each reference to all on-line

In Multics segments are packages of information which are directly
referenced and accessed in a controlled fashion. Access control is
realized by associating each segment a set of access attributes for
each user who may access the segment. Segments attributes are stored in
directories. Segments are referenced by symbolic names which must be
the pathname of the segment in the directory tree structure. Any
operation on a directory segments must be done via supervisor and
on nondirectory segments can be done directly in accordance with the
access right.

Multics provides for segments of sufficient maximum size so that only
a few can be core-resident at any one time. Thus breaking segments
into equal-size pages is implemented. And practical problems such as
space allocation, big segments are solved.

What worths mentioned is the design of the supervisor itself is
organized into segments and runs in the address space of each used
process. This has the advantage that some supervisory facilities
provided for the management of user segments can also be applied to
supervisory segments. The execution of supervisory in the address
space of each process facilitates communication between user
procedures and supervisor procedures.


Evaluation of the Paper: Machine-Independent Virtual Memory Management
for Paged Uniprocessor and Multiprocessor Architecture

The paper describes CMU Mach operating system virtual memory
management. One of the goals of Mach is to explore the relationship
between hardware and software memory architectures and to design a
memory management system portable to uniprocessors and multiprocessors
computing environments.

The important feature of Mach is its separation of software memory
management from hardware support. The machine-dependent portion of
Mach's virtual memory consists of a single code module and its
related header file, and it implements only necessary operations about
hardware required mapping data structures. All important virtual
memory information is maintained by machine-independent code.

Physical memory in Mach is treated primarily as a cache for the
contents of virtual memory objects. Informations of physical pages are
kept in page tables whose entries are linked to memory objects. A
contiguous range of virtual addresses are mapped on to a contiguous
area of a memory object via an address map whose structure can
efficiently implement the frequent operations performed on a task
address space. Mach memory objects are backing storage of address
maps. A pager is assigned to each object to handle page faults and
page-outs request outside of the kernel. The machine-dependent code
manages pmaps. Pmaps module need not keep track of all currently valid
mapping and virtual-to-physical mappings may be thrown away and new
mappings can be lazy-evaluated.

Mach runs on many uniprocesss and multiprocessors and it is shown that
separation of machine-dependent and independent memory management code
doesn't increase runtime cost and can in face improve overall performance.