For fun part of LAB-4 : UCSD from Lab-1 and Snake game Demo !!

-Gopi Tummala

Kindly make the following change in lab4_de1.v  (or) lab4_de2.v  to run snake.mif and ucsd.mif test programs.

This exercise would give you an idea of how good a Hardware and Software based system is !!

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wire [7:0] program_counter;

wire [15:0] register_A, memory_data_register_out, instruction_register, out;

wire clk_1Hz, HEX0_w, HEX1_w, HEX2_w, HEX3_w;

reg [15:0] hexdata ;

reg HEX0_s, HEX1_s, HEX2_s, HEX3_s;

 

// 7-seg display mux

always @ (*)

begin

     case (SW[2:0])

           3'b000: hexdata <= register_A ;

           3'b001: hexdata <= program_counter ;

           3'b010: hexdata <= memory_data_register_out ;

           3'b011: hexdata <= instruction_register ;

           3'b100: hexdata <= out ;

           default: hexdata <= register_A ;

     endcase

end

 

HexDigit d0(HEX0_w,hexdata[3:0]);

HexDigit d1(HEX1_w,hexdata[7:4]);

HexDigit d2(HEX2_w,hexdata[11:8]);

HexDigit d3(HEX3_w,hexdata[15:12]);

assign HEX3 = (hexdata[15:14] == 2'b00) ? hexdata[6:0] : 7'b1111111;

assign HEX2 = (hexdata[15:14] == 2'b01) ? hexdata[6:0] : 7'b1111111;

assign HEX1 = (hexdata[15:14] == 2'b10) ? hexdata[6:0] : 7'b1111111;

assign HEX0 = (hexdata[15:14] == 2'b11) ? hexdata[6:0] : 7'b1111111;

 

clock_divider clk1Hzfrom50MHz (

                     CLOCK_50,

                     KEY[0],

                     clk_1Hz

                     );

 

tc140l tiny_cpu(

           //SW[4]?SW[3]:CLOCK_50,

           SW[4]?SW[3]:clk_1Hz,

           ~KEY[0],

           program_counter,

           register_A,

           memory_data_register_out,

           instruction_register,

           out

       ) ;