CSE 140Components and Design Techniques for Digital SystemsFall 2010University of California, San Diego

Course Information

- Objective of this course is to introduce digital components and digital systems designs.
Instructor

- CK Cheng, CSE2130, ckcheng+140@ucsd.edu, 858 534-6184
Schedule

- Outlines (Use index to check the location of the textbook)
- Lectures: 3:30-4:50PM TTh, Center 113.
- Discussion: 4:00-4:50PM W, Center 109.
- Office hours: 1:00-2:00PM TTh, CSE 2130.
- Office hour: 2:30-3:00PM F 12/3, 1-2PM M 12/6, CSE 2130.
Teaching Assistants

Swathi Karunamurthy skarunam@ucsd.edu, Office hours: CSE B260A Mon 3pm - 4pm, Thurs 11am - 12pmVikram Murali vmurali@ucsd.edu, Office hours: CSE 3219 Wed 11am - 1pmShams Pirani spirani@ucsd.edu, Office hours: CSE 3219 Mon 10:30am - 12:30pmWebCT for CSE140/LTextbooks

- [H] Digital Design and Computer Architecture, David Money Harris and Sarah L. Harris, published by Morgan Kaufmann, 2007
- [S] Introduction to Digital Systems, James Palmer and David Perlman, published by Schaum's ouTlines, McGraw Hill, 1993
Lecture Notes and Exercises

- Lecture 1: Introduction

- Lecture 2: Combinational Logic

- Coverage: S.Chapter 2 and all exercises

- Discussion (09/29/2010)
- Lecture 3: Combinational Logic: Implementation

- Coverage: S.Chapter 3 and all exercises

- Lecture 4: Combinational Logic: Implementation(2)

- More Exercises

- Solution for More Exercises

- Lecture 5: Combinational Logic: Implementation(3)

- Lecture 6: Combinational Logic: Other Types of Gates

- Discussion (10/06/2010)

- Midterm 1 Solutions (10/14/2010)

- Lecture 8: Sequential Networks: Flip-Flops

- Coverage: S.Chapter 7 and all exercises

- Lecture 9: Sequential Networks: Specification

- Coverage: S.Chapter 8 and all exercises

- Lecture 10: Sequential Networks: Implementation

- Coverage: S.Chapter 10 Exercises 10.1-10.7, 10.15-10.19

- Lecture 11: Sequential Networks: Timing

- Lecture 12: Standard Combinational Modules: Decoders and Encoders

- More Exercises before Midterm 2

- Solutions for More Exercises before Midterm 2

- Midterm 2 Solutions (11/9/2010)

- Lecture 13: Standard Combinational Modules: Multiplexers and Demultiplexers

- Coverage: S.Chapter 5 and all exercises

- Lecture 14: Standard Modules II

- Lecture 15: System Designs I

- Reference: H.Chapter 7

- Lecture 16: System Designs II

- Lecture 17: System Designs III

- Lecture 18: Serial Adders and Multiplier

- Previous Exam

- Solutions for Previous Exam

- More Exercises before Final Exam

- More exercises and solutions from Spring 2007

- Solutions for More Exercises before Final Exam

- Lecture 19: Sequential Modules

Grading

- Midterm 1: 25% (Th 10/14)
- Midterm 2: 30% (T 11/09)
- Final Exam: 40% (3:00-6:00PM, M 12/06)