CSE 141L -- Computer Architecture Lab
Fall 2004, Instructor: Dean Tullsen
Xilinx Tutorial -- Wednesday, October 13, at 7:00 p.m. in APM 2444.
Typo in lab 1. See the lab assignments page.
141 home page)
Basic Course Information:
tullsen at cs dot ucsd dot edu
office hours: T 10-11, W 11-12, Th 4-5
TA: Allen Chu
office hours: M 8-9:30 p.m., W 1:30-3
room: EBU1 6307C, until further notice
awchu at cs dot ucsd dot edu
TA: Huayong Hu
office hours: Tu, Th 9-10:30
room: EBU1 6307A, until further notice
huhu at cs dot ucsd dot edu
Meeting times and places
Course textbooks and tools
There is no textbook for the class, but you will
find the CSE 141 textbook helpful in many ways during the lab
Patterson & Hennessy, "Computer Organization
and Design -- The Hardware/Software Interface", Morgan Kaufmann, Second
The lab will utilize, for some of the lab assignments,
the Xilinx foundation tools (version 4.2i available in the bookstore). Even better,
you can dowload a free version of the 6.2i tools (should be the same as
in the lab) from Xilinx here.
Other recommended reading
Hennesy & Patterson, "Computer Architecture:
A Quantitative Approach", 3rd edition, Morgan Kaufmann
a more advanced treatment of many of the same topics
in the textbook
Architecture Home Page
a comprehensive guide to research and general information
on computer architecture available on the web.
Labs will typically be due two weeks after they are
Once it is set up, the class mailing list will be
used by the instructor and the TAs for announcements, etc. All students
will be held responsible for announcements and information that go out
over the class mailing list. Make sure you are on it. To sign up
for the mailing list, send mail to email@example.com, with a blank subject
and one line in the body: add my_email_address cse141lab-l
There is a discussion board for asking questions and
posting help with the tools, etc. It is available at http://discus.ucsd.edu
The grade for 141L will be based solely on 4 lab
reports. I expect that most students will complete the lab assignments
as specified; thus, the quality of the lab reports will likely be the most
important factor in determining grades. Attendance will also be factored
into grades somehow.
Late assignments are not encouraged. All lab reports
are due at the beginning of class on Friday. Anything else is considered
late. You will have one grace weekend during the quarter. I.e., you
can turn one assignment in late, as long as it is in my office (under the
door) before 9 a.m. on Monday. I recommend not spending that grace time
frivolously early in the quarter. After you have spent your grace days,
late assignments will be accepted, but with significant penalties. We will
make every effort to return assignments to you in a timely manner -- limiting
your ability to turn things in late is, unfortunately, critical to that
All 4 lab reports are required. You must do
a credible job on each to pass the class.
Cheating WILL be taken seriously. It is not fair
to honest students to take cheating lightly, nor is it fair to the cheater
to let him/her go on thinking that is a reasonable alternative in life.
Don't test me on this one.
The following is not considered cheating:
-discussing the tools or logic design techniques
with other groups.
The following is:
-Copying lab designs from someone who is not
your partner, or lab report text from anyone.
-Viewing lab designs or lab reports from
anyone who is not your partner, including those who have taken the class
in previous years.
-Altering timing data produced by Xilinx, e.g.
to make a non-working design appear to be working.
Penalties -- anyone copying information or having
information copied on a lab will receive an F in the class and will not
be allowed to drop. They will be reported to their college dean.
If you can prove non-cooperative copying took place, your grade may be
restored, but you must prove it to the dean -- I don't want to be involved.
If you have comments or suggestions, email me at
tullsen at cs dot ucsd dot edu
There will be 4 lab assignments. Each will require
a written report. There will be no midterms or finals associated with this
class. The final grade will be determined by the quality of the lab reports
and the completeness and quality of the lab work (as demonstrated in the
Some but not all of the labs will require the Xilinx
tools, which everyone should be familiar with.
Most (but not all) of the labs can be done in groups
of 1 to 3. Lab reports are to be done collaboratively with your fellow
group members, except when specifically instructed otherwise. Changing,
splitting, merging of groups is only to be done with the permission of
the instructor, and such permission is typically not given.
Xilinx Foundation tools are available in
-APM 2444 and EBU2 315
Suns will be available in the uAPE lab in the AP&M
-personal copies of Xilinx are available through