Only the LogicWorks 4 files that relate directly to the operation of your processor need to be submitted. This includes any schematic and user created library files that you think might be necessary.
Yes. Your written reports are to be submitted at the beginning of your demonstration.
No. Due to the varying structure of each group's schematics, no actual components will be placed into your schematic during your demonstration. However, values supplied by the TAs will be loaded into your DMem (RAM) module before each program is tested.
Yes. Ideally, once you finish with your design, you should make a copy of it for each of the three programs to be run. This will help your demonstration flow more smoothly and will reduce the probability of lines not getting connected before being tested by the TAs.
Yes. Reset always takes precedence.
Anything that does not violate the constraints given in the Lab 1 project specifications is considered fair game.
There will be three (3) test cases total; one for each program. Your processor should be able to run all three of these test cases in about ten (10) minutes on the lab machines in AP&M 2444.
Yes. Cases that are unable to be run due to time constraints caused by unpreparedness on the part of your group, failure to show on time, or inefficient algorithms/designs will be counted as having failed those tests.
No. A wrong answer in DMem[2] is considered a failure on the part of the program, no matter how much work it performed before getting that answer.
No. Your processor must be demonstrated on one of the lab machines in AP&M 2444.
Barring some type of emergency situtation involving an entire group, no demonstration appointments will be rescheduled. Groups will not be docked points for members missing due to emergency situations.